Patent

Patent Portfolio

A growing patent portfolio covering key H-PHY circuit, signaling, and system concepts.

01

Core Technology Protection

Patent activities covering key H-PHY technologies and architectural concepts.

02

Global IP Development

Patent activities across Korea, the United States, China, and international filing routes.

03

Layered Technology Portfolio

Intellectual property spanning circuit, signaling, architecture, and system-level concepts.

04

IP-Aware Technology Development

Technology development informed by ongoing review of relevant prior art and patent landscapes.

05

Evolving Patent Families

Patent families developed alongside the continuing evolution of H-PHY technologies.

06

Supporting Future Collaboration

An IP foundation supporting future technical collaboration and continued development.

Patent Filings by Region

Core H-PHY technologies are filed and prosecuted across Korea, the United States, China, and the PCT route.

Korea
14+
KR Applications
7 Registered · 7 In Progress
United States
5+
US Applications
1 Registered · 4 In Progress
China
4+
CN Applications
4 In Progress
Others
X+
Other Jurisdictions
In Progress
PCT
7+
PCT Applications
6 Applications · 1 In Progress
Trademark
H-PHY™
Brand Identity
KR / CN / US In Progress

Innovation Timeline

A decade of layered R&D — each stage adds a new class of protected technology to the platform.

2016

Foundation (CCII Core)

Rail-to-Rail CCIIBase / MIC-AFEPower Supply
2020

Single-Wire Communication

System & CircuitLow-Swing Interface
2024

Data Communication

Device & SystemArchitecture Innovation
2025

High-Speed PHY & System

Ultra High SpeedAdvanced Architecture
2026~

Symbol Encoding, Clock Recovery

Encoding / DecodingSynchronizationPlatform Extension

IP-Aware Technology Development

H-PHY development includes ongoing review of relevant prior art and patent landscapes to inform architectural and circuit-level design decisions.

R&D Process
01
Patent Landscape Review
Prior-art sweep
02
Claim Analysis
Scope comparison
03
Architecture Review
Where required
04
Design Refinement
Third-party review
05
Commercial Deployment
Prepared for Practical Use
Our FTO Position
Architecture LayerIndependent
Core Architecture
Signaling Method
Receiver Topology
Encoding Scheme
Clocking & Sync.
Overall PHY Structure
Informed by Patent Landscape Review6 / 6
Architecture

H-PHY™ Technology Architecture

Current-domain signaling, RX-centric receiver architecture, and DC-balanced PAM signaling.

01

Architecture-Driven Innovation

A PHY architecture developed through circuit-level research and short-reach interconnect optimization.

02

Current-Domain Signaling

Current-domain signaling supporting ultra-low swing, energy efficiency, and scalable connectivity.

03

Ultra-Low Energy

Minimized CV2 switching energy enabling low energy per bit.

04

Robust Signal Integrity

Designed to reduce sensitivity to SSN, PDN disturbance, and crosstalk in high-density interconnects.

05

Technology-Scalable Architecture

Designed to scale with advanced process nodes, higher I/O density, and Wide I/O architectures.

06

Flexible System Integration

Designed for integration with SoCs, HBM interfaces, chiplets, and advanced packaging systems.

Trademark

H-PHY™ Brand Identity

The H-PHY™ trademark establishes a consistent technology identity and reflects a long-term commitment to next-generation semiconductor interconnect research.

01

Brand Identity

Establishing a consistent identity for the H-PHY technology platform.

02

Trademark Foundation

Trademark protection being developed across key markets.

03

Global Identity

Building a consistent technology identity across global research and industry communities.

04

Technology Credibility

Representing continuity, technical focus, and long-term commitment.

05

Technology Identity

A recognizable identity supporting the continued development of H-PHY technologies.

06

Long-Term Foundation

Supporting a stable foundation for continued research and technology development.

Digital Identity

Dedicated H-PHY™ Web Platforms

Dedicated H-PHY web domains have been secured to support technical communication, research visibility, and global accessibility.

.co.kr
h-phy.co.kr
Secured
.com
h-phy.com
Secured
.ai
h-phy.ai
Secured
.io
h-phy.io
Secured
Innovation

Continuous Technology Development

H-PHY continues to evolve through circuit research, simulation, silicon validation, and architectural development for future high-bandwidth interconnects.

01

Explore New Architectures

Explore new circuit and signaling approaches for next-generation interconnects.

02

Refine Through Engineering

Continuously refine circuit performance, energy efficiency, and signal integrity.

03

Scale Across Technologies

Evaluate H-PHY architectures across process nodes, interconnect structures, and system requirements.

04

Research & Technical Collaboration

Engage with research and industry communities to evaluate emerging interconnect challenges.

05

Advance System Efficiency

Develop technologies addressing bandwidth, energy, and integration challenges.

06

Continue Technology Evolution

Extend H-PHY concepts toward future memory, chiplet, and advanced packaging systems.

Vision

Advancing Short-Reach PHY Technology

Our focus is to establish a scalable technology foundation addressing the evolving energy, bandwidth, and integration requirements of AI, memory, and advanced packaging systems.

01

Anticipate Future Requirements

We anticipate future needs and identify what's next.

02

Define Technology Directions

A clear vision guides our innovations and long-term strategy.

03

Engineering-Driven Insight

Deep understanding of technology and markets drives meaningful solutions.

04

Develop Future Interconnects

We envision and build technologies that create lasting impact.

05

Innovation with Technical Purpose

Our vision inspires continuous innovation for a smarter, more efficient world.

06

Advance Connectivity Technology

Our technology vision empowers the next generation of connectivity.

Positioning

Beyond the Conventional Limits

Beyond Conventional Limits — H-PHY: New Short-Reach approach, Wide I/O